The Intel 80386 is a rather fascinating slice of computer history. It marked the first 32 bit X86 processor, and was a staple of early desktop computing. Like all chips, it has a number of quirks, one of which being the fact that all commands are executed in microcode. By this nature, it was a rather excellent prospect to be re-implemented in an FPGA core called the z386. However, it was lacking a feature native to the original 386, early start memory access. If you haven’t been c, [nand2mario] went forth to fully implement this feature for FPGA 80386s.  

Instead of taking a cycle to find and allocate the memory required for executing the next instruction, the 386 would start this in the previous cycle. This is achieved in hardware by nature of having a separate memory management unit. In the FPGA, the key difficulty proved to be in getting the computation fast enough to execute within a single cycle. This change netted an approximate 9% performance benefit. However, for [nand2mario] this was too small a performance uplift. 

Some rewrites of the store cue allowed for cutting a cycle out of the process further improving the performance. However, more performance required slight deviations from the design of the original 386. Because code-branches are performance critical, the z386 project now computes the branch memory jump several cycles earlier than the 386, reducing the cycle time for the jumps from 9.25 to a mere 6. Some final changes to the microcode decode frontend rounded out the optimizations covered in this latest blog post.

The net result is an approximate 39% increase in performance in the all important DOOM benchmark. The z386 still not a complete project, the performance is still lacking compared to the 386, and it remains unable to boot Windows. X86 is complicated, which will take time, so make sure to stay tuned for more coverage! While you wait, make sure to check out our original writeup of the z386 project. 

Pauli Rautakorpi, CC BY 3.0.

英特尔 80386 是一段相当迷人的计算机历史。它标志着第一款32位X86处理器，并成为早期桌面计算的主流。和所有芯片一样，它有许多古怪之处，其中之一就是所有指令都在微码中执行。正因如此，它在FPGA核心中重新实现为z386核心是非常有前途的。然而，它缺少原始386的一个原生特性：早期启动内存访问。如果你还不了解，[nand2mario] 前去为FPGA 80386完整实现了这一特性。  

386不会花费一个周期来查找和分配执行下一条指令所需的内存，而是在上一个周期就启动这一过程。这在硬件层面上是通过单独的内存管理单元实现的。在FPGA中，关键难点在于让计算速度足够快，以便在一个周期内完成。这一改动带来了大约9%的性能提升。然而，对于[nand2mario]来说，这个性能提升太小了。

对存储队列进行的一些重写使得可以从流程中削减一个周期，从而进一步提高性能。然而，要获得更多性能，就需要对原始386的设计进行小幅偏离。由于代码分支对性能至关重要，z386项目现在比386提前几个周期计算分支内存跳转，将跳转的周期时间从9.25减少到仅有6。对微码解码前端的一些最终修改完善了这篇最新博文中涵盖的优化。

最终结果是，在至关重要的DOOM基准测试中，性能提升了大约39%。z386仍然不是一个完整的项目，其性能与386相比仍有差距，并且仍然无法启动Windows。X86很复杂，这需要时间，所以请继续关注更多报道！在你等待的同时，请务必查看我们对z386项目的原始报道。 

Pauli Rautakorpi，CC BY 3.0。